The present invention relates to a crystal oscillator circuit and more particularly to a clock signal buffer of a crystal oscillator circuit that has high noise immunity and requires low power.
As the modern electronic technology continues to advance, smaller and sophisticated electronic devices such as cellular phones and personal digital assistants are developed to meet popular demand in the market. The electronic devices are built with complex mixed signal chips that may be used in a noisy environment. In addition to the requirements of small volume and light weight, these devices have to be immune to noise and consume low power.
An important circuit that exists in almost every modern electronic device is a clock signal generator which is usually made of a crystal oscillator circuit. A clock signal generator provides the basic timing control signal in an electronic circuit. A complex mixed signal chip used in an advanced electronic device often has to support an event-triggered wake-up function during a power saving mode. For the device to function properly, it is critical that the clock signal generator can be immune to noise and consumes little power.
FIG. 5 shows a conventional crystal oscillator circuit. The circuit has an oscillator gain stage 510 and an output buffer 520. If the circuit is used in a chip that comprises high pin count or high gate count, large noise is frequently generated when the output buffer 520 is in a switching state or the core logic is in a transition state. The nose is coupled to its power supply, ground node, or other signal lines. As a result, the output clock signal of a conventional crystal oscillator circuit may also have the noise that prevents the electronic system from working properly and sometimes even causes the system to break down.
In addition to the drawback of noise, in the circuit as shown in FIG. 5 the output buffer 520 includes two MOS transistors that may be turned on at the same time in its switching state. At some instance during the switching state, large short circuit current occurs when the two transistors are turned on simultaneously. Consequently, much power is wasted by the conventional crystal oscillator circuit.
This invention has been made to overcome the above-mentioned drawbacks in the conventional crystal oscillator circuit. The primary object of the invention is to provide a crystal oscillator circuit that can be effectively immune to noise. A high frequency noise filter as well as a power supply noise filter are used in the buffer circuit of the present invention to improve the noise immunity of the circuit.
According to the present invention, the crystal oscillator circuit comprises an oscillator gain stage, a high frequency noise filter, an intermediate amplifier, an output buffer and a power supply noise filter. A voltage reduction circuit is provided in the oscillator gain stage to adjust and optimize the level of the voltage swing of the generated clock signal. An intermediate amplifier amplifies the generated clock signal. The high frequency noise filter then filters the clock signal. The output buffer further buffers and amplifies the clock signal to generate the output clock signal.
Another object of the invention is to provide a crystal oscillator circuit that saves power. Accordingly, the high frequency noise filter includes a time-delay circuit to ensure that the two transistors in the output buffer are not turned on simultaneously to avoid large short circuit current in the switching state. Consequently, the power consumption of the crystal oscillator circuit of this invention is greatly reduced.